Surface morphology of polyimide thin film dip-coated on polyester filament for dielectric layer in fibrous organic field effect transistor

The idea of wearable electronics automatically leads to the concept of integrating electronic functions on textile substrates. Since this substrate type implies certain challenges in comparison with their rigid electronic companions, it is of utmost importance to investigate the application of materials for generating the electronic functions on the textile substrate. Only when interaction of materials and textile substrate is fully understood, the electronic function can be generated on the textile without changing the textile's properties, being flexible or stretchable. This research deals with the optimization of the dielectric layer in a fibrous organic field effect transistor (OFET). A transistor can act as an electrical switch in a circuit. In this work, the polyimide layer was dip-coated on a copper-coated polyester filament. After thoroughly investigating the process conditions, best results with minimal thickness and roughness at full insulation could be achieved at a dip-coating speed of 50 mm/min. The polyimide solution was optimal at 15w% and the choice for the solvent NMP was made. In this paper, details on the pre-treatment methods, choice of solvent and dip-coating speed and their effect on layer morphology and thickness, electrical properties and roughness are reported. Results show that the use of polyimide as a dielectric layer in the architecture of a fibrous OFET is promising. Further research deals with the application of the semiconductor layer within the mentioned architecture, to finally build an OFET on a filament for application in smart textiles

Synthesis and characterization of copper, polyimide and TIPS-pentacene layers for the development of a solution processed fibrous transistor

A study was performed for the development of a flexible organic field effect transistor starting from a polyester fibre as substrate material. Focus of subsequent layer deposition was on low temperature soluble processes to allow upscaling. Gate layer consists out of a pyrrole polymerization and copper coating step. Polyimide dielectric layer was deposited using dipcoating. Gold electrodes were vacuum evaporated and patterned via mask fibre shadowing. The active layer consisted of a soluble p-type TIPS-pentacene organic semiconductor. Different deposition techniques have been examined. Considerable progress in development of a transistor has been made

The future of smart textiles according to systex

Abstract: SYSTEX is a European coordination action for enhancing the breakthrough of smart textile systems. SYSTEX wants to find answers to the question why only few products have reached the market, in spite of huge investments in research. Tasks include collection and analysis of information on science and technology as well as on markets, organization of training and education and policy building. A special task is inter project cooperation in order to avoid duplication of work. This paper will present the major findings and recommendations for the research community

Nieuws uit de Vakgroep Textielkunde: smart textile fundamentals: research on textile electronics

The expression 'Smart Textiles' does not only comprise intelligent clothing. There is far more behind the wording. The Department of Textiles is conducting research which is going to the bottom of this field of expertise, i.e. fundamental research on textile electronics : fibrous transistors and textile batteries